Internship_Development of a UVM environment within an existing Simulation Platform_1 to 3 months - Bevaix, Switzerland
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Your future job
As an intern at Melexis, you will develop a UVM environment within an existing Simulation Platform.
More specifically, you will:
Develop/re-use a set of scripts/tools to automatically generate a configurable UVM environment.
Develop/re-use a set of scripts/tools to integrate SV unit tests within the latter environment.
Integrate the latter environment within our existing Simulation Platform.
Expected results
- Template for a configurable UVM environment.
- SV Unit test integration.
Requirements
SystemVerilog, Verilog, UVM; Verilog-AMS is a plus.
Makefile, Python, Perl, shell scripting.
Linux and Windows basic knowledge.
Spoken and written English would be a plus.
We offer
A challenging job in a dynamic high-tech international environment.
An enjoyable, team-oriented and professional atmosphere in a flat-structured organization.
Facts and Figures
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Working Hours per Week
40
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Business Travel Required
Yes, according to position accountabilities
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Work Permit Required
Yes
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Working in Shift Required
No