Internship_Design and layout an analog block in SOI CMOS technology_4 to 6 months - Bevaix, Switzerland
As an intern at Melexis, you will work together with the design team to explore a new CMOS technology from XFAB.
You will design an analog block (oscillator, bandgap, low-noise amplifier, voltage regulator…) in order to analyse the performances of this technology for our future magnetic sensor products.
More specifically, you will:
Design and simulate an analog block in SOI CMOS technology using Cadence environment.
Analyse the performances (noise, PSRR, speed, etc) over temperature and process corners.
Layout using Cadence Layout XL.
Document of the block for implementation in a full system.
- Schematics of the designed block
- Test benches used for verification
- Layout of the block
- Design report, analysis of performances versus state-of-the-art blocks
Analog design basics
Good English skills
Familiarity with analog CAD environments
Willing to learn
Good communication skills
A challenging Internship in a dynamic high-tech international environment
An enjoyable, team-oriented and professional atmosphere in a flat-structured organization
Versatile development opportunities
Facts and Figures
Working Hours per Week
Business Travel Required
Work Permit Required
Working in Shift Required