Development & Quality

Internship - Verilog LINT using formal proof tool - 3 months - Paris, France

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Project Description

Our current digital design flow uses a “standard” linter from Cadence (HAL). The target of this internship is to replace it by a “more intelligent” one based on a formal proof engine (JasperGold).

You will have to develop Python, makefile and TCL scripts to incorporate the new tool and configure it to our specific needs.

LINT : A static code analysis used to flag errors, bugs, stylistic errors and suspicious constructs.

 

Your profile

  • Master 1

  • Basic knowledge in RTL coding (Verilog and/or VHDL)

  • Basic programming knowledge

We offer

Joining Melexis for your internship is the opportunity to build up your know-how in a high-tech, international and dynamic company, benefit from the experience and training of our experts and enjoy the welcoming and friendly atmosphere of our team. 
Our Paris office is specialized in Digital Design and counts 18 employees.

 

Facts and Figures

  • Working Hours per Week

    35

  • Business Travel Required

    Yes, according to position accountabilities

  • Work Permit Required

    Yes

  • Working in Shift Required

    No