Internship - Develop Indago flow for RISC-V CPUs - 3 months - Paris, France





What we do
Melexis engineers microelectronic solutions. These solutions facilitate the work of our customers. By easy integration. By taking innovation one step further. By providing a competitive advantage. Our technology makes cars and other products smarter, safer and greener. Our sensors capture data from the analog world and comprehend these data digitally. Our drivers make sure customers can bring their products to life. As we always have a plan, we come with the right products at the right moment so our customers stay one step ahead of the competition. That’s what we call inspired engineering.
Who we work for
We mainly focus on semiconductors for the automotive industry. Melexis is energizing the transition to Electrical Vehicles (EVs). We increase the efficiency of Internal Combustion Engine (ICE) cars. Besides the automotive market, we cater to other markets as well.

How we make the difference
Our people are and make the difference. Melexis creates a framework for colleagues to grow, thrive and create impact for themselves, the customer and the company. Because we care, we empower and we excel. We believe in the power of diversity. Spread over 3 continents, 1900 colleagues from 50 nationalities shape the best imaginable future.

Project Description

Melexis is developing a new 32-bit platform (RISC-V based) as the continuation of our homemade CPUs. So, some parts of our flow have to be updated to this new CPU architecture.

An important tool used for software debugging on RTL simulation is Indago, which allows to visualize register contents, assembly and C code until execution, memory content and organization, interrupt states. It can also dynamically interact with the simulator to emulate breakpoints and ease debugging of SW and HW.
This tool has to be configured for our RISC-V CPU and integrated in our flow with the other tools.

During this internship you will have the opportunity to gather knowledge on CPU, debug  tools, Makefile, Python and TCL.

Expected results

  • An integration in our digital flow of this tool for RISC-V.
  • Optionally, you will also backport the tool improvements and integration done to our homemade CPUs.

Your profile

  • Master 1
  • Basic knowledge in RTL coding (Verilog and/or VHDL)
  • Basic programming knowledge

We offer

Joining Melexis for your internship is the opportunity to build up your know-how in a high-tech, international and dynamic company, benefit from the experience and training of our experts and enjoy the welcoming and friendly atmosphere of our Paris office team which is specialized in Digital Design and counts 20 employees.

Facts and Figures

  • Working Hours per Week


  • Business Travel Required

    Yes, according to position accountabilities

  • Work Permit Required


  • Working in Shift Required